NI PXIe-6738 AO Module Board 32 CH

This NI PXIe-6738 AO Module Board integrates 32 16-bit voltage output channels in a single PXI Express slot, with a maximum single-channel update rate of 1 MS/s. It is a flagship analog output solution for high-density stimulus generation and open-loop simulation applications.

The core advantage of this module lies in the combined benefits of "high density + high speed + high synchronization accuracy". By integrating 32 analog output channels into a single PXIe slot, the NI PXIe-6738 AO Module Board 32 CH significantly reduces the chassis slot requirements of multi-channel systems. Simultaneously, leveraging the synchronization capabilities of the PXI Express bus, it can achieve nanosecond-level synchronization with other PXI modules such as data acquisition, digital I/O, motion control, and machine vision modules, providing a unified timing reference for complex automated test systems.

From a product line perspective, the PXIe-6738 belongs to the PXI Express generation of the NI 67xx high-speed voltage output series. This series was designed to replace traditional benchtop instruments (such as standalone PID controllers, low-speed arbitrary waveform generators, and function generators), providing more flexible and expandable signal generation capabilities in a modular manner. Building upon the high-density characteristics of its predecessor, the PXI-6723, the PXIe-6738 increases the resolution from 13-bit to 16-bit, upgrades the bus architecture from PXI to PXI Express, and increases the number of counters from 2 to 4, resulting in significant improvements in overall performance and functional density.

Typical applications cover the following areas:

• Stimulus-Response Testing: Provides multiple synchronous excitation signals for acoustic distortion testing, semiconductor characterization, etc.
• Open-Loop Simulation: Generates sensor simulation signals in hardware-in-the-loop (HIL) and system simulation.
• Three-Phase Power Simulation: Simulates three-phase power system waveforms through multi-channel synchronous output.
• Industrial Control and Actuator Driving: Drives multiple actuators, solenoid valves, piezoelectric sensors, etc.
• Automated Test Systems (ATS): Serves as a signal generation subsystem in verification and mass production testing.

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Specific Details

Differentiation advantages:

Compared to its predecessor, the PXI-6723, the NI PXIe-6738 AO Module Board 32 CH increases the resolution from 13-bit to 16-bit, the update rate from 800 kS/s to 1 MS/s, and the number of counters from 2 to 4 (all 32-bit). The bus is upgraded from the traditional PXI to PXI Express, significantly enhancing synchronization capabilities. Furthermore, the PXIe-6738 adds a PLL (phase-locked loop), supports locking to more reference clock sources, and achieves a timing accuracy of 50 ppm (guaranteed value).

The PXIe-6738 differs in positioning from its sibling, the PXIe-6739 (64-channel version, order number 783801-01), targeting ultra-high-density applications, while the PXIe-6738 is a 32-channel version, representing a more cost-effective mainstream model. Both are identical in their per-channel architecture (16-bit resolution, 1 MS/s peak rate, bank-style DAC design). The PXIe-6739 doubles the number of channels by adding a second connector, and the number of digital I/O lines increases from 10 to 20.

Bus differences between PCIe-6738 and PXIe-6738: PCIe-6738 (order number 785822-01) is a desktop PCI Express card version, using an x4 PCIe Gen 1.1 interface, while NI PXIe-6738 AO Module Board 32 CH is a PXI modular version, using an x1 PXI Express interface and integrating the PXI platform's backplane synchronization bus resources (PXITRIG, PXISTAR, PXIeDSTAR, PXIeCLK100). Both have the same core analog output specifications, but the PXIe version is more suitable for test system scenarios involving multi-module synchronization and chassis-level integration.

The image above compares the channel count and update rate of three representative PXI analog output modules in the NI 67xx series. The PXIe-6738, while maintaining a 32-channel density, increases the resolution to 16 bits and achieves a peak update rate of 1 MS/s, making it a balanced choice between density and performance.

The PXIe-6738 belongs to the NI 67xx high-speed voltage output device family, which is the core family of NI's analog output product line and has undergone multiple generations of evolution:

• The first generation (PCI/PXI parallel bus era): represented by NI 6711/6713/6722/6723, based on the PCI/PXI parallel bus architecture. Among them, the PXI-6723 was a high-density model with 32 channels, 13 bits, and 800 kS/s, and was the direct predecessor to the PXIe-6738. This generation of products generally used 13-bit resolution and were primarily aimed at control and low-speed waveform generation applications.

• The second generation (PCI Express / PXI Express serial bus era): represented by PXIe-6738 / PXIe-6739 / PCIe-6738, fully transitioned to a high-speed serial bus architecture, increasing resolution to 16 bits and adding more counters and advanced timing functions. This generation introduced a bank-style DAC architecture (each DAC drives 4 channels), optimizing cost and power consumption while maintaining high density.

Intergenerational relationships and product matrix

• Multi-channel Synchronous Analog Output

The core function of the NI PXIe-6738 AO Module Board 32 CH is to generate 32 independently controllable analog voltage output signals. The module employs a bank-based DAC architecture, meaning the 32 channels are divided into 8 banks, with each bank containing 4 channels sharing a single DAC. This design ensures that all channels within the same bank update synchronously at the same time, guaranteeing strict phase consistency between channels. When the user's channels are distributed across different banks (up to 8 channels, one per bank), a peak update rate of 1 MS/s per channel can be achieved; when all 32 channels are enabled, the update rate is 350 kS/s.

The advantage of this architecture is that it ensures a high density of channels while achieving peak performance in critical application scenarios (such as using 8 channels for synchronous excitation). For scenarios such as high-density open-loop simulation, the ability of 32 channels to update simultaneously at 350 kS/s far exceeds that of most traditional benchtop function generators.

• Three Waveform Generation Modes

The PXIe-6738 supports three AO waveform generation modes to flexibly address different application needs:

Nonperiodic Waveform: Outputs a single, finite-length waveform, suitable for applications such as impulse response testing and single-excitation.

Onboard FIFO Periodic Waveform Regeneration Mode: Waveform data is stored in an onboard 65,535-sample FIFO, automatically looping in hardware without consuming bus bandwidth, achieving the highest update rate.

Host Cache Periodic Waveform Regeneration Mode (including dynamic updates): Waveform data is streamed from host memory, supporting dynamic updates of waveform data at runtime, suitable for closed-loop control scenarios requiring real-time output adjustments.

• Digital I/O and Waveform Generation

In addition to analog outputs, the PXIe-6738 integrates 10 digital I/O lines, divided into two groups:

Port 0 (P0.0-P0.1): 2 lines, supporting static DIO and hardware timing waveform generation/acquisition (up to 10 MHz clock), equipped with a dedicated FIFO (DO: 2,047 samples, DI: 255 samples)

Port 1 / PFI (PFI 0-7 / P1.0-P1.7): 8 lines, multiplexed—can be used as static digital I/O or as a programmable function interface (PFI) to connect internal timing signals.

Each digital line can be independently configured as an input or output and supports programmable dejitter filtering (90 ns / 5.12 µs / 2.56 ms / custom interval / disabled) to adapt to different noise environments.

• Multi-function Counter/Timer

The PXIe-6738 features four 32-bit general-purpose counters/timers, each with an independent DMA channel, for applications including:

Counter measurements: edge counting, pulse, pulse width, half-cycle, period, double-edge interval.

Position measurements: X1/X2/X4 quadrature encoding (with Z-channel reset), dual-pulse encoding.

Output applications: pulse generation, dynamic pulse train updates, frequency division, equivalent time sampling.

The internal reference clock provides 100 MHz, 20 MHz, and 100 kHz time bases. External clock inputs are supported up to 25 MHz. The reference clock accuracy is 50 ppm (guaranteed).

• Advanced Synchronization and Triggering

Leveraging the backplane resources of the PXI Express platform, the PXIe-6738 offers industry-leading synchronization capabilities:

PLL Phase-Locked Loop: One built-in PLL can lock various reference signals including PXIeDSTAR (10/20/100 MHz), PXISTAR (10/20 MHz), PXIeCLK100 (100 MHz), PXITRIG (10/20 MHz), and PFI (10/20 MHz).

Inter-device Trigger Bus: Supports multiple trigger buses such as PXITRIG (0-7), PXISTAR, and PXIe-DSTAR (A/B).

External Digital Trigger: Analog output supports trigger modes such as Start Trigger, Pause Trigger, Sample Clock, and Sample Clock Timebase.

Multi-Chassis Synchronization: Enables high-precision synchronization across chassis when used with PXI timing modules.

The PXIe-6738's workflow can be summarized as follows:

The host writes waveform data to the module's FIFO via the PXI Express bus → The DMA controller automatically schedules data transmission → The DAC converts the digital signal to an analog voltage under Sample Clock timing → The output channel drives an external load after signal conditioning.

Throughout the process, the timing engine can be driven by an internal time base, an external clock, or the PXI backplane clock, and the trigger signal can come from multiple sources, achieving highly flexible waveform generation control.

The module has 7 built-in DMA channels (1 each for AO, DI, and DO + 4 counters), achieving efficient data transmission through scatter-gather DMA technology, significantly reducing CPU utilization. A 65,535-sample onboard FIFO acts as a data buffer to prevent data interruptions caused by bus jitter.

Environmental Specifications

Application:

The NI PXIe-6738 AO Module Board 32 CH, with its high density, high speed, and strong synchronization characteristics, has wide applications in the following fields:

• Semiconductor Testing: Providing multiple precision excitation signals for wafer testing and chip verification

• Aerospace and Defense: Simulating sensor outputs and avionics bus signals in HIL simulation systems

• Automotive Electronics: Signal simulation in Battery Management System (BMS) testing and ECU simulation

• Acoustics and Vibration Testing: Signal generation for multi-channel acoustic excitation and structural dynamics testing

• Power System Simulation: Three-phase power waveforms and grid disturbance simulation

• Industrial Automation: Multi-channel PID control, actuator driving, and process control simulation

• Research and Teaching Laboratories: General-purpose multi-channel signal source and experimental platform construction

Software User Manual

Core Driver: NI-DAQmx

The PXIe-6738 is fully supported by NI's flagship data acquisition driver, NI-DAQmx. NI-DAQmx is a unified driver architecture developed by NI for its DAQ hardware, providing a consistent API interface covering all NI multi-function DAQ and AO devices.

Supported Application Development Environments (ADE)

The PXIe-6738 supports multiple programming languages ​​and development environments via NI-DAQmx:

• NI LabVIEW: A graphical programming environment, the most mainstream development method
• LabWindows/CVI: A C language IDE
• C/C++: Through the DAQmx C API
• C#/Visual Basic .NET: Through the DAQmx .NET API
• Python: Through the nidaqmx Python package

• Measurement Studio: The Visual Studio integrated development environment

PXIe-6738 meets the following international standards and regulations:

Safety Standards:

• IEC 61010-1 / EN 61010-1 (Safety requirements for electrical equipment for measurement, control, and laboratory use)
• UL 61010-1 / CSA C22.2 No. 61010-1 (North American safety certification)​​​​​​​
• Measurement Category: Measurement Category I (Channel to Ground ±11 V)

Electromagnetic Compatibility (EMC) Standards:

• EN 61326-1 (IEC 61326-1): Class A Radiated Equipment, Basic Immunity
• EN 55011 (CISPR 11): Group 1, Class A Radiated Equipment
• FCC 47 CFR Part 15B: Class A Radiated Equipment
• ICES-001: Class A Radiated Equipment

Environmental Compliance:

• EU RoHS Directive (2011/65/EU)
• China RoHS (Regulations on the Management of Pollution Control of Electronic Information Products)
• WEEE Directive (Waste Electrical and Electronic Equipment)

Tailored Solutions for Unique Challenges

We understand that off-the-shelf equipment often falls short of complex, specialized project demands. To bridge this gap, our veteran engineering team delivers full-scale OEM and ODM customization services built around your precise specifications. From modifying frequency bands and integrating bespoke triggering protocols to engineering custom chassis layouts, we collaborate with you at every stage. This agile design philosophy ensures your final system is perfectly optimized for your target application, without ever compromising our strict reliability standards.

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• Secured Global Supply: Through strategic partnerships with premium carriers, we ensure your critical components arrive safely, securely, and right on schedule.

FAQs:

Q: Why can't my PXIe-6738 achieve a maximum sampling rate of 1 MS/s on all 32 channels simultaneously?

A:  

The board's DAC (Digital-to-Analog Converter) uses a group-shared architecture. A maximum single-channel sampling rate of 1 MS/s can only be achieved when using ≤ 8 channels, each allocated to a different bank. When all 32 channels are activated, the maximum synchronous update rate per channel decreases proportionally due to shared bandwidth (typically dropping to around 350 kS/s).

Q: The original system uses low-density old boards (such as PXI-6723). How can it be directly and seamlessly upgraded to PXIe-6738 without changing the wiring?

A: 

The PXIe-6738 employs a high-density connector interface. To facilitate upgrades for legacy users, NI has released a dedicated NI-6738 front-end wiring adapter. Installing this adapter on the front of the PXIe-6738 board allows for seamless hardware upgrades without requiring changes to existing SH68-C68-S cables, directly supporting the existing PXI-6723 wiring definitions.

Q: How to achieve microsecond-level waveform synchronization output between multiple PXIe-6738 boards?

A: 

The PXIe-6738 supports advanced timing and synchronization features of the PXI Express bus. When writing NI-DAQmx programs, the Start Trigger and Sample Clock of one board can be routed to the PXI_Trig or PXIe_CLK100 bus of the PXI analog backplane. Other slave boards can then be configured to receive these backplane signals directly from their clock sources, achieving complete synchronization.

Q: What drivers are required for PXIe-6738? Can it be used on non-Windows systems?

A: 

This board uses the standard NI-DAQmx driver. In addition to supporting LabVIEW and LabWindows/CVI, it fully supports standard general-purpose languages ​​such as C/C++, Python, and .NET. For Linux environments, the NI-DAQmx version for Linux RT or major Linux distributions can be downloaded from NI's official support driver page.

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